
The Amplify FPGA Physical Optimizer product was the first and is the only
proven physical synthesis tool designed specifically for programmable
logic designers. By performing simultaneous placement and logic
optimization, the Amplify FPGA product has demonstrated an average of over
21% performance improvement and over 45% improvement in some cases when
compared with logic synthesis alone. Now with hundreds of users and in its
second generation, the Amplify product includes integrated design planning
and analysis capability reducing design iterations through highly accurate
timing estimations.
The Amplify FPGA Physical Optimizer product was created for programmable
logic designers utilizing today-s complex FPGA devices, and who need to
converge on aggressive timing goals as quickly as possible. RT Level
physical constraints, along with standard timing constraints, are provided
to the Amplify product's highly innovative new physical synthesis
algorithms, resulting in superior circuit performance in a fraction of the
time normally required by traditional methodologies.
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